Veritas Qualifying Exam 1 Practice

Virtual memory creates an abstraction between the addresses a program uses and the actual physical RAM, allowing a larger, isolated address space and efficient memory use. The Translation Lookaside Buffer (TLB) is a small, fast cache that stores recent virtual-to-physical address translations. When the CPU accesses a virtual address, the memory management unit first checks the TLB. If the translation is there (a TLB hit), the memory access proceeds quickly. If not (a TLB miss), the system must walk the page table to obtain the translation, load it into the TLB, and then access memory. This combination speeds up memory access and enables correct isolation and protection. The option describing virtual memory as abstracting physical memory and the TLB caching address translations is the best fit because it captures both the abstraction function of virtual memory and the speed boost provided by caching translations. The other statements miss key ideas: the TLB caches translations, not page contents; virtual memory is not the same as cache memory; and virtual memory involves an abstraction layer, not a direct mapping to physical memory without that layering.