Cameroon GCE A-Level Computer Science (0795) Practice Questions - Cameroon General Certificate Of Education Advanced Level Computer Science (Syllabus 0795) Exam

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In a standard accumulator-based CPU architecture, which sequence of Register Transfer Level (RTL) micro-operations correctly represents the instruction fetch phase?

MAR <- [PC]; PC <- [PC] + 1; MDR <- Memory[MAR]; CIR <- [MDR] MDR <- [PC]; MAR <- [MDR]; CIR <- Memory[MAR]; PC <- [PC] + 1 CIR <- [PC]; MAR <- [CIR]; MDR <- Memory[MAR]; PC <- [MDR] MAR <- [ACC]; MDR <- Memory[MAR]; PC <- [PC] + 1; CIR <- [MDR]

Correct Answer:

MAR <- [PC]; PC <- [PC] + 1; MDR <- Memory[MAR]; CIR <- [MDR]

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