Cameroon GCE A-Level Computer Science (0795) Practice Questions - Cameroon General Certificate Of Education Advanced Level Computer Science (Syllabus 0795) Exam

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During a memory read operation in the fetch cycle, how do the Memory Address Register (MAR) and Memory Data Register (MDR) interact with the system buses?

MAR places data onto the data bus while MDR receives the target address from the address bus. MAR holds the address placed onto the address bus, while MDR latches the data returned from memory via the data bus. MAR decodes the operation code while MDR sends control signals over the control bus to synchronize RAM. Both MAR and MDR send parallel 64-bit addresses over the address bus to achieve interleaved memory access.

Correct Answer:

MAR holds the address placed onto the address bus, while MDR latches the data returned from memory via the data bus.

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